Job Title: Senior DFT Engineer Location: Remote working possible from within the UK, France or Germany. Are you an experienced Senior DFT Engineer looking to take the next step in your career? We are actively seeking talented individuals for full-time positions focused on Design for Testability (DFT) across multiple levels, from unit design to chip level, within areas of CPU and SoC DFT design and verification. This role will immerse you in the full spectrum of DFT design, from scan and MBIST to ATPG. Key Responsibilities for the Senior DFT Engineer: Define DFT strategy and methodologies, ensuring alignment with industry standards. Design DFT features and define test and debug structures and test plans. Create and manage test vectors, collaborating with the physical design team to close requirements. Collaborate closely with designers to enhance test coverage, improve debug observability, and maintain flexibility. Essential Requirements: As a Senior DFT Engineer, you will bring: A strong foundation in digital logic design, microprocessor fundamentals, debug features, DFT architecture, and both CPU architecture and microarchitecture. Proficiency in DFT and structural debug concepts and methodologies, including JTAG, IEEE1500, MBIST, scan dump, and memory dump. A solid understanding of Verilog and SystemVerilog, along with experience using simulators and waveform debugging tools. Skills in Python, Shell scripting, Makefiles, and TCL are advantageous. Excellent problem-solving skills, with a high level of self-motivation, and strong communication and organisational abilities. This opportunity as a Senior DFT Engineer offers the chance to work with cutting-edge technology and collaborate with a high-calibre team of professionals in a dynamic environment. If you have a passion for driving innovation in DFT design and are ready to make an impact, we want to hear from you. Apply today and be part of a growing team that values expertise and commitment For more information, please contact Lucy Edmondson at IC Resources.