Job Overview: Arm’s verification engineers continuously push the boundaries of what is possible with simulation, formal, and emulation tools to produce industry-leading CPU IP. If working on innovative technology in a world-class team sounds like an exciting challenge then a role as an Arm Verification Engineer is for you!
Responsibilities:
For this role, we are looking for experienced Verification Engineers who can contribute to all phases of the verification flow. This includes:
1. Development ownership of varied aspects of unit verification environments including testbench components, test stimulus, checkers, and functional coverage. Involvement in end-to-end verification processes, from test plan creation through to verification closure.
2. Investigation of test failures and debugging of sometimes complex technical issues that can cross team boundaries.
3. Work with project leads and team members to plan, prioritize, track, and coordinate tasks to meet quality goals at the planned time.
4. Contribute to verification improvement activities across the CPU group and the wider Arm verification community.
Required Skills and Experience:
1. Experience of simulation based verification of RTL designs. Familiarity with constrained random verification, coverage metrics, checking methodologies.
2. Software development skills to write flexible, maintainable code in an object-oriented language. Familiarity with version control, preferably using git in conjunction with a change-based code review flow.
3. Ability to apply complex specification detail. Curiosity to resolve ambiguities.
4. Proficiency in problem solving and debugging.
5. The interpersonal and communication skills to work well in a team and a practical, result-focused approach.
Nice to have Skills and Experience:
1. Familiarity with assembly language (preferably Arm).
2. Understanding of computer architecture fundamentals, such as pipelining, exception handling, and memory systems. Perhaps some practical experience of working on microprocessor designs.
3. Familiarity with SystemVerilog, maybe using a methodology such as UVM.
4. Python programming experience, for example to automate verification flows.
5. C++ programming experience, maybe in the context of a mixed-language testbench.
6. Experience with Continuous Integration flows using tools such as Jenkins.
7. Experience with formal verification.
8. Experience leading, coordinating, or mentoring small teams.
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