Job Description
Senior/Staff Verification Engineer | CPU | System Verilog / UVM
Are you passionate about pushing the boundaries of technology? A world-leading Semiconductor Company is looking for Senior & Staff level Verification Engineers to join the company in Cambridge or Manchester, UK in the CPU Group.
Join a world-class team of verification engineers and work on cutting-edge CPU IP. We're seeking experienced verification engineers who are passionate about innovation to help us develop industry-leading designs using simulation, formal, and emulation tools. If you're ready for a challenging and rewarding career, this is your chance!
Responsibilities:
* Developing and owning key components of unit verification environments, such as testbench components, tests/stimulus, checkers, and functional coverage.
* Participating in end-to-end verification processes, from test plan creation to verification closure.
* Investigating test failures and debugging complex technical issues, often collaborating across teams.
* Working closely with project leads and team members to plan, prioritize, track, and coordinate tasks to meet quality goals and deadlines.
* Contributing to verification improvement initiatives across the CPU group and the broader verification community.
Required Skills:
* Proven experience with simulation-based verification of RTL designs, including constrained random verification, coverage metrics, and checking methodologies.
* Strong software development skills and the ability to write flexible, maintainable code in an object-oriented manner. Experience with version control systems (preferably Git) and change-based code review workflows.
* Ability to interpret complex specifications and a keen eye for resolving ambiguities.
* Excellent problem-solving and debugging skills.
* Familiarity with assembly (ideally Arm).
* Understanding of computer architecture fundamentals (pipelining, exception handling, memory systems) and practical experience with microprocessor design.
* Proficiency in SystemVerilog and experience with methodologies like UVM.
"Nice-to-have" Skills:
* Python programming skills for automating verification flows.
* C++ programming experience, particularly in mixed-testbenches.
* Experience with Continuous Integration tools like Jenkins.
* Experience with formal verification.
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