As an Advanced Chip Layout Engineer at Vishay Siliconix, you will play a critical role in supporting the product design team in creating innovative designs and providing expert advice based upon agreed requirements and specifications.
Responsibilities:
Our ideal candidate will be responsible for working closely with the product design team to generate layouts of devices and components for various advanced technology platforms.
Key Responsibilities:
* Producing high-quality layouts for typical discrete power semiconductor MOSFET device layouts for high-voltage applications.
* Collaborating with the design lead to lay out chip floorplans using core P-cells and specially designed termination structures and Process Control Monitor (PCM).
* Executing proficiently all layout checks (DRC, ERC, LVS, etc.).
* Maintaining DRC checks and amending rules in a controlled manner where appropriate.
Other Responsibilities:
* Generating fractured data as well as layout designs.
* Carrying out XOR checks on both fractured data and layout designs.
* Providing expertise in Cadence tools, Mentor data structure, and other layout tools.
* Ensuring data integrity and building layout libraries, which are used to build the layout of products.
* Validating that all designs are DRC clean, XOR checked, and approved prior to being sent to the mask shop.
Requirements:
* College Diploma or BSc or equivalent work experience.
* At least 10 years of experience/expertise in related experience in layout of devices in analog and power components.
* Very good knowledge of Cadence tools, Mentor data structure, and other layout tools.
* Excellent communication skills interacting with R&D engineers.
Benefits:
Vishay offers a comprehensive suite of benefit programs including health care coverage, financial support programs, and other resources designed to help you achieve your personal and professional goals.