Digital Design Verification - RISC-V ISA - Processor Microarchitecture - CPU - Formal Verification - Model checking - Property checking - SVA - OneSpin - JasperGold
International teams - Start-up culture
Locations: France (Villeneuve-Loubet), Germany (Munich), the UK (Bristol/Cambridge), the Czech Republic (Brno, Prague), Barcelona (Spain), Greece (Heraklion/Thessaloniki/Athens)
Department: Verification
Employment Type: Full-Time
Experience: Mid-Senior Level
Daily collaboration with: Laurent Arditi (Formal Verification Lead)
Codasip is scaling up, so we would like to announce a Formal Verification role with the main goal to raise the usage of formal techniques applied to Codasip processors, including Low-Power embedded and High-Performance RISC-V application processors, including multiple-issue and/or multi-core architectures as well as the high-end ones.
YOUR CORE RESPONSIBILITIES WILL BE:
1. Enable formal verification users to apply standard and advanced methodologies and techniques
2. Contribute to the development of tools
3. Focus on the verification of RISC-V processors and their components to raise the quality of our deliverables
4. Review and support FV test plans
YOU NEED TO POSSESS THE FOLLOWING KNOWLEDGE AND SKILLS:
1. Passion for electronics, embedded SW, or programming and algorithms
2. Model checking and/or theorem proving
3. Experience with formal verification techniques (abstractions, constraints, coverage, equivalence checking, etc.)
4. Knowledge of HDL languages (Verilog, SystemVerilog, VHDL) and property languages (SVA, PSL,...)
5. Knowledge of versioning tools (Git -preferred)
6. Practical usage of Linux
7. Proficiency in scripting languages, e.g. Python
8. Communicative English
NICE-TO-HAVES:
1. Desire to play a role in shaping the RISC-V world of tomorrow
2. Interest in complex algorithms
3. Experience in FV tools (QuestaFormal, OneSpin, Jasper, VC Formal)
WHAT WE CAN OFFER YOU:
1. Opportunity to work with RISC-V, computer architecture of the future
2. Working on innovative IoT processors and unique processor optimization technology
3. Participation in the whole development process from analysis to deployment
4. Opportunity to collaborate with experienced developers located in France, the UK, Germany, Spain, Greece, Poland, and the Czech Republic
5. Receptivity to your own innovations and ideas
6. Freedom and trust from Codasip management
We're passionate about RISC-V processors. If you are, apply now :)
#J-18808-Ljbffr