We are seeking a highly skilled Formal Verification Engineer to join our team at IC Resources. As a key member of our team, you will be responsible for applying formal methods to verify the correctness of hardware designs, ensuring that systems meet functional specifications and are free of design errors.
Key Responsibilities:
* Formal Verification of Hardware Designs: Use formal verification tools and techniques to verify digital designs at various levels of abstraction, including RTL and gate-level.
* Tool and Methodology Development: Develop, maintain, and enhance formal verification methodologies and scripts, as well as extend existing verification flows to improve efficiency and coverage.
* Testbench Creation: Create and maintain formal verification testbenches, ensuring comprehensive test coverage for complex designs and features.
* Bug Detection and Debugging: Identify design flaws, corner cases, and potential issues early in the design process using formal verification techniques. Provide in-depth analysis and support for debugging and fixing issues.
Required Qualifications:
* Educational Background: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
* Experience: Proven experience with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools).
* Familiarity with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques.
* Experience with assertions (e.g., SVA - SystemVerilog Assertions) and formal verification environments.
In return for your expertise, you can expect a competitive salary range of £60,000 - £80,000 per annum, depending on your level of experience and qualifications. Additionally, you will have the opportunity to work with a dynamic start-up, contributing to the development of cutting-edge technologies and contributing to the growth of a global company.