Firmware Design Engineers x 2
+ 12 month contracts
+ Up to £75 per hour
+ Portsmouth based
Key Skills:
1. Understanding of DSP
2. VHDL Encoding to a high standard in a Linux environment
3. Linux experience
4. Verilog / SystemVerilog
5. Xilinx Vivado experience, particularly use of block diagrams and non-project mode
Role Overview:
You will join our Modems and Software Defined Radio group and report to the Engineering Manager of the project, delivering a new product to the UK MOD.
Mandatory Skills:
1. Understanding of DSP
2. VHDL Encoding to a high standard in a Linux environment
3. Xilinx Vivado experience, particularly use of block diagrams and non-project mode
4. Tcl scripts for configuring and connecting IP and building projects in the Vivado environment
5. Verilog / SystemVerilog
6. Git for version control
7. Atlassian toolset (e.g. Jira, Confluence, BitBucket)
8. Agile or Scrum working environment
Beneficial Skills:
1. Familiarity with Zynq Ultrascale RFSoCs e.g. use of AXI busses, associated IP
2. Makefile, Linux shell, Jenkins Control scripts
3. System and software modelling tools such as Enterprise Architect (SysML / UML)
4. Python for test purposes
5. SDR (Software Defined Radio)
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