Purpose of role
Candidate will be a hands-on technical contributor on ASIC/SoC and IP development projects. Candidate will contribute to verification projects using high level verification languages. You will work very closely with ASIC/SoC project leaders to implement complete verification environments and methodologies. This position also involves analyzing customer technical requirements, proposing solutions, and working collaboratively in a multi-site development environment. You are a team member but also efficient on independent tasks.
Responsibilities
* Participate to RTL verification within your responsibility area.
* Specify features and creating verification plans.
* Develop test environments.
* Create test cases, running simulations.
* Analyse and debugging the design.
* Keep up to date with all the advances in the field and ensure the company is well at the forefront of the state-of-the-art technology, methodologies and processes used in the industry.
* Contribute to creative and talented technical teams able to achieve targets.
* Skills and Specifications: Hands-on skills in IP and/or SoC level functional verification.
* Communicate with cross functional teams and contribute to verification plans
* Independently deliver a verification task to agreed goals with some guidance from more senior engineers.
* Contribute to technical white papers.
* Contribute to creation of sales documents
Desirable
A degree/masters or PhD in either a relevant subject
Masters or PhD in a related subject but with 2 years practicable experience
Skills & experience
Essential
* Minimum of 2+ years’ experience
* Metric driven verification, verification planning, functional coverage, code coverage, Unit level or Top-level verification.
* Proven experience of architecting the SoC level test bench from scratch and implementation.
* Proven experience of verification work on complex SoC using System Verilog and any of latest methodologies such as UVM
* Strong knowledge of the latest ARM-based interfaces such as AXI, and high-speed serial connectivity.
* SoC / Subsystem verification experience and AMBA (AXI, APB, AHB) protocol experience.
* Experience with processor-based verification and test bench, testcases, assertions, functional & code coverage, running regressions and debugging tests.
* System Verilog, VHDL and C knowledge is essential
* Some ability to work independently but will work as part of a team.
* Solves problems of moderate complexity
* Integrates thorough technical knowledge within discipline
Desirable
* SystemVerilog, UVM, ABV, constrained random verification
* VHDL SVA,
* VMM, OVM
* Verification infrastructure automation – Perl, Python, Java, Tcl, IP-XACT
* Coverage databases e.g., UCDB
* Understanding of AMBA bus protocols
* Experience with Cadence Palladium, Synopsis (VCS, Verdi) tools or equivalent is advantageous
* Excellent leadership, communication and negotiation and time management skills
* Self-organisation and ability to respond to changing priorities quickly
* Team player and self-motivated
* Ability to work under pressure
* Organisation and problem-solving skills
* Excellent attention to detail
* Able to work under own initiative