Join an excellent Engineering team in Cambridge as a Formal Verification Engineer. You will develop high-quality Formal Verification test benches to verify complex designs in GPU. Proficiency in debugging, formal tools, and methodologies is required.
Key qualifications include:
* Several years of ASIC design, verification, or related work experience.
* Verification skills: Formal verification (Static and Dynamic), Assertion based verification.
* System Verilog, Verilog or VHDL, Scripting skills required.
* Design debug, Deep bug hunting, Formal test planning, Formal tools – Jasper, VC-formal.
* Simulation based verification using UVM/System Verilog.
Expect a competitive salary, stock, and performance-related bonus, stock purchase scheme, and various insurances.