MCS Group has a unique opportunity for a Senior Verification Engineer to work with a world renowned organisation who build semiconductors and provide wireless technology services. This Senior Engineer will gain invaluable exposure to a fast paced and ever-evolving sector, and work on market-leading projects.
This is a highly specialised position, and experience at a senior level in a similar role is required.
The Details
* Deploy UVM and Formal Verification techniques to verify complex SoC designs.
* Develop and maintain Testbenches and Verification Components (UVCs), C models, and Vertical/Horizontal verification environments.
* Write, debug and analyse SystemVerilog assertions to ensure proper design functionality.
* Writing Python/Perl scripts to automate work-flows and improve team efficiency.
The Person
* Extensive senior-level experience with Verilog, C/C++, SystemC, and TCL/Perl/shell-scripting for test automation and customisation is required.
* This role requires extensive experience in verifying SoCs (8-12 years) and working with SoC Methodologies.
* Proficiency in SystemVerilog, UVM, and constrained random verification techniques is also essential.
* You will have solid experience with integrating C models into the verification flow and generating score-boarding for functional validation.
* You will have in-depth experience with AMBA protocols and BUS interconnect functional verification.
Location: This role is available for remote work from anywhere within the United Kingdom.
Rates: Negotiable.
IR35: Inside.
To speak in absolute confidence about this opportunity, please contact Jill Johnston, Head of IT Contracts, at MCS Group 02896 935 509 or send an up-to-date CV via the link provided.
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