We are bringing together excellent talent and expertise from across the semiconductor industry to drive how the next generation of leading AI compute on Arm devices are built. Thus opening up significant and exciting future potential!
Arm is rapidly growing the Systems IP team to develop outstanding solutions based on Arm's IP, addressing AI challenges in secure compute, large screen compute, infrastructure and automotive markets.
As a lead implementation engineer, you'll be influencing Arm solutions development to optimize the power and performance. You will innovate, evolve and lead optimal tape-out quality implementations.
Responsibilities:
* Physical implementation of Arm Solutions using the entire physical implementation flow from RTL to GDSII, including Synthesis, Floorplanning, Place & Route, STA, Power Analysis and Physical Verification.
* Lead the implementation work to optimize performance, power, and area as the need arises and build outstanding implementations of our designs.
* Work collaboratively with design teams to influence system micro architecture to achieve the highest standards.
* Enable our chip design partners to support their physical implementation success.
Required skills and experience:
* Working experience of large SoC systems integration including power and physical architecture and leading some aspect of this work.
* Comprehensive understanding of the concepts related to synthesis, place & route, clock tree synthesis, constraint development, timing closure, design for test, and knowledge of hardware languages: Verilog/System Verilog.
* Writing and validating UPF.
* A curiosity about embracing new silicon implementation techniques and methodologies.
* Good leadership skills to drive exceptional teamwork with good communication, able to present ideas, results, and conclusions in a proficient and organized way.
'Nice to have' skills and experience:
* Knowledge of systems architecture, Arm IP, and Arm-based SoCs.
* A curiosity about AI hardware technology.
* Past experience with programming languages for data processing and presentation.
* Experience with low power design techniques - clock and power gating, voltage/frequency scaling, retention.
* Understanding of power delivery and experience of static and dynamic IR-drop analysis.
* A STEM degree in a relevant field, such as electronics engineering or computer science.
In return:
You will get to utilize your engineering leadership to build support for the technologies and influence millions of devices for years to come. You will be able to drive and bring your ideas to a wider group of our leading authorities, build your technical leadership and influencing skills, and work towards becoming an established and recognized authority within the existing team.
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