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Systems IP - Staff/Principal Verification Engineer, Cambridge
Client: arm limited
Location: Cambridge, United Kingdom
Job Category: Other
EU work permit required: Yes
Job Reference: 11a90870e6f7
Job Views: 87
Posted: 22.01.2025
Expiry Date: 08.03.2025
Job Description:
The Role
This position is an excellent opportunity for an experienced and highly motivated verification engineer to join the hardworking System IP team! This is a fast-paced technical role employing the latest hardware design and verification methodologies to develop complex and highly configurable hardware IP that sit at the heart of Arm-based Systems! This role is for the Interconnect product team.
The Interconnect team develops the Arm Corelink Interconnect IP family. Our Interconnects and NoCs are designed for intelligent connected systems across a wide range of applications including mobile, IoT, networking infrastructure, automotive etc. The highly scalable IP is optimised for AMBA-compliant SoC connectivity and can be customised for multiple performance points.
Responsibilities:
* Specifying and developing new hardware verification testbenches for future generation hardware IP.
* Improving existing testbenches to increase performance, quality and efficiency.
* Identifying areas for improvement in processes and methodologies, then implementing those changes to advance our best-practices and state of the art for hardware verification.
* Reviewing and assessing proposed design changes from a verification complexity point of view.
* Ownership of verification environment from investigation all the way to verification closure.
* Investigating and scripting new verification flows and optimising existing ones.
* Analysis of data from simulation runs using machine learning and data science techniques to drive efficient bug discovery and debug.
* Opportunities for improving our verification methodology and mentoring other members of the team.
* Close collaboration with other Arm engineering teams leading to high quality IP that works well in a complete system.
Required Skills and Experience:
* Experience in working with constrained-random verification including ownership of a suitably complex verification environment.
* Experience of using SystemVerilog and UVM.
* Proven software engineering skills including understanding of object-oriented programming, data structures, and algorithms.
* Familiarity with the tools and processes for developing testbenches and finishing all aspects of the verification process.
* Competence in developing verification flows, making the best use of EDA tools and good scripting skills.
'Nice To Have' Skills and Experience:
* Team leadership and mentoring experience.
* Multiprocessing microarchitecture experience including knowledge of cache coherence and bus protocols (AMBA5 CHI, AMBA4 ACE or AXI).
* Experience in Formal Verification testbenches is a plus.
* Strong communication skills and ability to work well as part of a team.
* Dedicated with a focused approach to problem analysis and solving.
In return:
You will get to utilise your engineering skills to build support for the technologies and influence millions of devices for years to come. You will be able to drive and bring your ideas to a wider group of our leading experts, build your technical leadership and influencing skills and build towards becoming an established and recognised expert within the existing team.
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