Senior FPGA Engineer | £80-110k | Maidenhead | Remote
My client's innovative technologies have facilitated the deployment of high-speed internet and robust communication networks for remote and underserved areas, fostering digital inclusion and supporting the growth of smart cities and IoT applications.
Due to the launch of a cutting-edge, and innovative project, they are looking for a Senior FPGA Engineer to join their DSP department.
Main duties:
+ Full FPGA development cycle involvement, from design to testing
+ Cross functional collaboration with a multi-disciplinary team
+ Technical liaison, and maintenance and design specification of documentation
Skills and Experience Required:
+ Deep understanding of FPGA fundamentals, fabric, and clocking resources
+ Proficiency in Verilog/System Verilog
+ Experience with RTL-level design
+ Previous telecommunications experience
+ Knowledge of 4G or 5G standards
+ DSP algorithm design & implementation experience
Bonus:
+ Experience with scripting languages (e.g. Python, Shell, Perl)
+ Experience with high speed interfaces (PCIe, 10Ge, JESD)
What you’ll get:
+ Very competitive salary with a budget around £80-120k
+ Healthcare & pension scheme
+ 25 day’s holiday + bank holidays
+ Opportunity to work remotely with occasional office visits
+ A team of elite multi-disciplinary engineers with long-tenures at the company
+ Flat organisational structure, meaning your ideas get heard and there’s very little office politics
+ Chance to travel the world to sites & offices abroad
If you feel like you have the right skills and experience for this role, then please apply with a copy of your updated CV.
Keywords: electronic design, hardware design, firmware, FPGA, Verilog, SystemVerilog, telecommunications, DSP, digital signal processing, digital signal processors, MATLAB, Python, C, C++, Shell, Pearl, PCle, 10GE, JESD, 5G, 4G, wireless telecommunications, field programmable gamma array, clocking, senior, RTL design, RTL-level design, fabric, algorithm, networking, network, FPGA Engineer
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